A plurality of devices for significantly increasing a computer's computing power, which are called coprocessors or accelerators represented by GPGPU (General Purpose GPU (Graphics Processing Units)), may be included in the computer and used. In such a case, a scheduling scheme for efficient use of these coprocessors or accelerators is needed.
Accelerators mainly focus on computing functions, and so it is difficult to directly issue an I/O (Input/Output) from an accelerator to an I/F (Interface) card. In view of this, coprocessors or accelerators that have a function of performing I/O communication from a coprocessor or an accelerator directly through an I/F card are emerging as represented by the feature called GPUDirect.
An example of a scheduling scheme used in the case of executing a plurality of jobs by a plurality of coprocessors in parallel is a scheduling scheme described in Patent Literature (PTL) 1.
PTL 1: the specification of United States Patent Application Publication No.